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12-Reticle SiPs: Intel Draws New Clients With EMIB/Foveros Direct Scaling

Tom's Hardware reports Intel plans to build massive system-in-packages using advanced packaging, attracting new customers seeking sophisticated scaling options.

Illustration: A flat circuit board holds several square silicon chips stacked vertically like tiny skyscrapers.
AI-generated illustration: BitShield News

Key points

  • Intel aims to create system-in-packages spanning 12 reticles using EMIB and Foveros Direct.
  • New customers are emerging to leverage these advanced packaging capabilities.
  • Tom's Hardware Premium subscribers received detailed analysis of the roadmap this week.

Tom's Hardware reported this week that Intel is advancing its packaging roadmaps for EMIB and Foveros Direct technologies. The company’s stated objective is to construct system-in-packages that encompass the area of 12 reticles. This development signals a shift toward more sophisticated hardware offerings, with new customers reportedly seeking to utilize these capabilities for their own products.

By the numbers

  • 12 reticles: the target size for Intel's future system-in-packages.
  • 1: the number of primary packaging technologies highlighted (EMIB and Foveros Direct).
  • 0: confirmed CVEs or security vulnerabilities associated with this roadmap update.

What the figures mean

The push toward 12-reticle packages indicates Intel is focusing on scaling chip performance through advanced packaging rather than solely relying on traditional die shrinkage. According to Tom's Hardware, the EMIB and Foveros Direct roadmaps are maturing, enabling more complex system designs. This approach allows for greater integration of different chiplets into a single package, potentially improving performance and power efficiency for high-end applications.

What should you do?

Managed service providers should monitor how these packaging changes affect hardware compatibility and supply chains. Teams usually review vendor roadmaps to anticipate hardware refresh cycles. Check whether current client infrastructure can support future generations of these advanced chips. Ensure procurement teams are aware of potential shifts in component availability and pricing as new packaging methods become standard.

Operational impact

Organizations should assess how advanced packaging trends influence long-term hardware procurement strategies. Procurement teams need to evaluate whether current server and workstation fleets will remain viable as chip integration methods evolve. IT leaders should communicate with suppliers to understand potential lead time changes for components using new packaging technologies. Staff responsible for hardware maintenance must stay informed about compatibility requirements for future upgrades.

What to do and how to stay safe: Intel

  • Review current hardware refresh cycles to see if they align with vendor packaging roadmaps.
  • Consult with suppliers about the availability and lead times for components using advanced packaging.
  • Evaluate whether existing client workloads will benefit from or be hindered by new chip integration methods.
  • Monitor vendor announcements for specific product launches that utilize these packaging technologies.

Step-by-step guide: Shadow AI Explained: 8 Questions Answered for Secure Operations

General security guidance from the BitShield News newsroom. It is not confirmed advice from the organisations named in this story.

Frequently asked questions

What is Intel's goal for its packaging roadmap?

Intel aims to build system-in-packages the size of 12 reticles using EMIB and Foveros Direct 3D.

Who is interested in these new packaging capabilities?

New customers are looking to cash in on building more sophisticated offerings using these technologies.

Where was this information reported?

The details were published in Tom's Hardware Premium for subscribers this week.

Sources

  1. Tom's Hardware
IntelEMIBFoveros Directsystem-in-packageschip scaling

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